Monthly Archives: September 2015

Advanced ADCs in digital oscilloscopes will enhance design awareness

The continuing trend toward faster, cheaper, more accurate analog-to-digital converters will top the list of advances in instrumentation in the 1990s. Digitizing oscilloscopes may be the most significant product, combining the speed of analog oscilloscopes with the ability to simultaneously examine high-speed transient events on multiple channels. By enabling engineers to get a clearer picture of what is going on in high-speed digital systems, digitizing oscilloscopes will speed design implementation. A side effect of the oscilloscope changeover will be the gradual disappearance of logic analyzers, which are essentially one-bit digitizing oscilloscopes. Advances in a-d convertors will also spur development of the instrument-on-a-card concept, which envisions medium performance instrumentation in the form of cards that fit in a VXI bus-based mainframe.

The most exciting technological advance in instrumentation in the ’90s will be the continuing improvement in analog-to-digital converters, as they continue to get faster, less expensive, and more precise. As a result, a whole host of changes in instrumentation may be anticipated. Probably the most important change will be the changeover in oscilloscopes from analog to digital in all but the lowest-cost, lowest-performance areas.

The new breed of digitizing oscilloscopes will have all of the speed that was formerly available only from analog instruments. But they’ll also offer a capability that average designers could never access before: the ability to examine high-speed transient events on multiple channels simultaneously.

Not surprisingly, that capability is exactly what’s needed to analyze the behavior of the types of circuits that average designers will be building. I say “not surprisingly” because those new circuits will be based on the same advances in semiconductors that will make the new oscilloscopes possible. To be specific, those circuits will be very fast digital designs, such as systems based on 50-MHz microprocessors. These systems will have sub-nanosecond rise times and will require timing resolutions of tens of picoseconds.

Today, if engineers have to troubleshoot a design of that type, much of what they do will consist of guesswork. They use their knowledge and experience to guess what the problem might be, fix it based on that assumption, and check to see whether the problem went away. Eventually they fix the problem, but rarely is it known whether the problem was what was originally thought. The higg-speed single-shot events that cause the problems simply can’t be seen on today’s conventional instruments.

The new breed of reasonably-priced oscilloscopes will give average engineers the ability to really understand what’s happening with their high-speed digital systems. I can’t say precisely what effect that capability will have on design methodologies, but it’s sure to be considerable. It will certainly enable engineers to implement designs more quickly. In other words, it’s a productivity tool.

It can also be a learning aid. When you truly understand what went wrong and why your fix worked, you may have learned something that will give you a hint of what to avoid in the future.

Another interesting outcome of the oscilloscope changeover will be the disappearance of the logic analyzer as a separate piece of instrumentation. A logic analyzer, after all, is merely a one-bit digitizing oscilloscope. As the price of a-d converters continues to drop, a point will be reached where it makes sense to build, say, 80-channel digitizing oscilloscopes. With such instruments, there’d be no need for a simple logic analyzer.

As a result of advances in oscilloscopes, I expect substantial changes in microwave engineering design methodologies. Today, most microwave design work is done in the frequency domain because the dominant measurement tools available to microwave designers–spectrum analyzers and network analyzers–work in this domain.

But given a choice, a majority of engineers would prefer to work mostly in the time domain. At lower frequencies, where there has long been a choice, both design and analysis are done in the time domain because it’s easier to spot most problems there. For example, if your amplifier is clipping a sine wave, it can easily spotted on an oscilloscope. In the frequency domain, however, all you’d see are some second and third harmonics, which may also be caused by crossover distortion or some other nonlinearity. With a spectrum analyzer, you know there’s a problem and you know when it’s been solved, but you don’t necessarily know what you did to fix it.

Aside from fomenting what amounts to a revolution in oscilloscopes, advances in a-d converters will also give a powerful boost to the instrument-on-a-card concept. I expect that much of the medium-performance instrumentation produced toward the end of the decade will be in the form of cards that will fit into an instrumentation mainframe based on the VXI bus. This type of packaging, however, will be of more interest to manufacturing and test engineers–to whom size and configurability are very important–than to designers. But wherever it’s applied, the instrumentation card cage will offer lots of very neat solutions.


Diffusion welding at low temperatures suits the fine lines of power MOSFETs

Siemens AG, Munich, West Germany, has developed a new technique for bonding silicon power devices to molybdenum substrates. The three-step process uses relatively low temperatures, avoiding the stresses of conventional alloying processes while achieving high thermal-cycling stability and electrically stable contacts with negligible resistance.

The high temperatures used in alloying can cause warping of device surfaces during cooling because of the different thermal expansion coefficients of molybdenum and silicon, making the process unsuitable for finely wired devices such as power MOSFETs. The new process places less mechanical strain on the devices because the lower temperatures eliminate the danger of warping during cool-down. And the process is highly reproducible, yielding the same results consistently, making it ideal for production line use.

A diffusion welding technique developed at Siemens AG, Munich, West Germany, welds silicon power devices to molybdenum substrates at comparatively low temperatures. Consequently, the technique avoids the drawbacks of alloying processes, and achieves high thermal-cycling stability and electrically stable contacts that have negligible resistance.

MOSFET showing gate (G), body (B), source (S) and drain (D) terminals. The gate is separated from the body by an insulating layer (white)

Power devices generally call for a low-cost current supply, good heat-radiation characteristics, and high mechanical stability. To achieve these properties, the silicon chips are firmly attached to a substrate. What’s usually done in this chip-to-substrate attachment operation is to insert a aluminum foil between the chip and a molybdenum disk and then, in an alloying process, affix the device to a 2- to 3-mm-thick molybdenum substrate.

The high temperature, up to 700[degrees]C, encountered in this process imposes limits on its use, however. For one, different thermal expansion coefficients of molybdenum and silicon can warp device surfaces as they cool. For that reason, the alloying process can’t be applied to finely structured devices like power MOSFETs.

The new technique, developed at Siemens’ Munich-based research laboratories, takes a different tack. In the first of three steps, the silicon and molybdenum surfaces to be joined are supplied with a sinterable layer of silver, for example. In the second step, silver particles with a diameter of about 10 [micrometer] and suspended in a solvent are deposited on the molybdenum. The solvent is evaporated by momentary hearing, leaving a silver layer behind.

Finally, after the silicon chip is put on top of the silver layer, the silicon-silver-molybdenum sandwich is sintered for two minutes at a relatively low temperature, about 240[degrees]C, and a pressure of about 4000 [N/cm.sup.2].

According to Reinhold Kuhnert, head of the development team, the new technique leads to a porous silicon-molybdenum connecting cayer with high thermal and electrical stability, as well as thermal and electrical conductivity values comparable to those gotten with conventional high-temperature alloying processes.

Kuhnert points out that one advantage of the new diffusion is that it puts low mechanical stress on the device; that’s because it doesn’t warp after cooling. Another advantage is that it’s higly reproducible, which means that the results are consistent time after time–a prerequisite for use on any production line. Moreover, careful control of the silver-deposition process compensates for several microns of substrate unevenness that may occur.

Further, in contrast to alloying processes, no silicon is consumed in diffusion welding. Also, the silicon doping level remains unaffected. Because the technique is based on solid-state reactions–there’s no liquid phase involved–the temperature stability of the chip-to-substrate connection is far higher than the temperature encountered in device fabrication. As a result, although the device is made at law process temperatures, it can withstand the high temperatures developed under surge-current loads.

The technique, which may soon go to work on the production line, isn’t limited to attaching discrete devices to substrates. In one process, many small elements (such as all those on a 4-in. wafer) can be contacted to their substrates.

In addition, by using suitable multilayer substrates made of materials with thermal conductivity higher than that of molybdenum, heat can be removed faster, according to Kuhnert.